1. Field of the Invention
The present invention relates to a packaging technique for electronic parts. More particularly, the present invention relates to a wiring substrate capable of packaging electronic parts in accordance with the COB (chip-on-board) system, a method of manufacturing the wiring substrate, and a semiconductor device using the wiring substrate. The xe2x80x9celectronic partxe2x80x9d used herein refers to various kinds of parts that can be mounted on the wiring substrate. Specifically, the electronic parts include semiconductor elements such as IC chips and LSI chips, passive elements, and a power source. Therefore, the semiconductor device of the present invention can also be referred to as an electronic device.
2. Description of the Related Art
Recently, there have been many requests for reduction in size, reduction in thickness, and reduction in weight of devices, as well as increase in performance, in the fields of electronic devices such as personal computers, portable telephones, and PHS""s. In order to meet these requests, techniques of packaging semiconductor elements on wiring substrates have been developed and practically used.
Various packaging techniques have already been known. As one of these techniques, there is a flip-chip bonding method. The flip-chip bonding method is for directly mounting a semiconductor element onto a wiring substrate through a metal bump disposed between a pad of the wiring substrate and an external-connection terminal of the semiconductor element. This method does not use a conductive wire, that cannot match with a complex structure having complex wiring, for electrically connecting and mounting the semiconductor element onto the wiring substrate. When the metal bump is melted under a heat treatment, it is possible to electrically connect the semiconductor element onto the wiring substrate, by fixing the pad of the wiring substrate and the external-connection terminal of the semiconductor element together. According to this method, however, thermal stress attributable to a difference between the coefficient of thermal expansion of the wiring substrate and that of the semiconductor element is concentrated onto the metal bump, and this damages the bump, itself, when the metal bump is heated to melt it.
In order to solve the above problems, various trials have been made to relax the stress through the improvement in a packaging structure. For example, there is a method of filling a resin into a gap between a wiring substrate and a semiconductor element after the pad of the wiring substrate and the external-connection terminal of the semiconductor element have been fixed together with a metal bump. This method is called an under-fill structure method. It is possible to prevent damage to the metal bump by reinforcing the mechanical strength of the bump relying upon the mechanical strength of the resin. However, according to this method, it is not possible to completely avoid damage to the bump, as the concentration of the thermal stress onto the bump is not prevented.
In order to prevent the thermal stress from being concentrated onto the bump, there is a method of disposing a sheet-like thermosetting resin type adhesive into the gap between a wiring substrate and a semiconductor element, instead of filling a resin into this gap. According to this method, the semiconductor element is disposed on the wiring substrate via the adhesive. Then, the semiconductor element is thermally compressed, so that the adhesive is cured in a state that the metal bump has been connected to the pad of the wiring substrate. When the temperature of the semiconductor element has been returned to room temperature, a compressive force like thermal compressive force is generated in the cured adhesive. Based on this compressive force, the metal bump is pressed against the pad of the wiring substrate. According to this method, the terminal of the semiconductor element and the pad of the wiring substrate are not fixed together via the metal bump. Therefore, it is possible to prevent the concentration of the thermal stress attributable to the difference between the coefficient of thermal expansion of the wiring substrate and that of the semiconductor element onto the metal bump. However, according to this method, when the coefficient of thermal expansion of the adhesive is larger than that of the metal bump, there arises a gap between the bump and the pad at the time of a testing temperature cycle. This brings about a problem of a poor connection between the bump and the pad.
In order to improve the reliability of the connection between the pad of the wiring substrate and the metal bump, a semiconductor device as shown in FIG. 1 has been proposed in Japanese Unexamined Patent Publication (Kokai) No. 10-270496. In this semiconductor device, a semiconductor chip 60 is mounted on the packaging surface of a wiring substrate 51 having a rigid substrate 52 via an adhesive 66. An external-connection terminal 63 of the semiconductor chip 60 is connected to a pad 54A of the wiring substrate 51 via a bump electrode 65. Particularly, in the case of the semiconductor device shown in FIG. 1, a recess 54B is formed on the pad 54A, and the pad 54A and the bump electrode 65 are connected together within this recess 54B. The pad 54A is formed on the surface of an elastic layer 53. The recess 54B of the pad 54A is formed based on an elastic deformation of the pad and the elastic layer 53. The elastic layer 53 is formed with an epoxy-type low-elasticity resin having a lower coefficient of thermal expansion than that of the adhesive. When this structure is employed, it is possible to reduce the gap between the wiring substrate 51 and the semiconductor chip 60 by the volume corresponding to the concave volume of the recess 54. Therefore, it is possible to lower the thermal expansion of the adhesive in its thickness direction as a result of the reduction in the thickness of the adhesive. As a result, it is possible to prevent the occurrence of a poor connection at the time of the temperature cycle test.
As described above, various studies have so far been carried out and proposals have been made on methods useful for increasing the reliability of the connection between the pad of the wiring substrate and the metal bump. However, all the methods entrust the stress relaxation to the improvement in the package structure. Therefore, these methods lead to a complex structure, which complicates the manufacture process and causes an increased manufacturing cost.
It is, therefore, an object of the present invention to provide a wiring substrate capable of increasing the reliability of the connection between a pad of a wiring substrate and an electronic part like a semiconductor chip, without complicating the structure and the manufacturing process.
It is another object of the present invention to provide a method suitable for manufacturing this wiring substrate.
It is still another object of the present invention to provide a semiconductor device that uses this wiring substrate.
The above objects and other objects of the present invention will be easily understood from the following detailed explanation.
As a result of a concentrated study for achieving the above objects, the present inventors have found that the improvement in the wiring substrate in place of the improvement in the package, along with movable wiring of a conductive pattern on the wiring substrate, are effective for achieving the objects.
According to one aspect of the present invention, there is provided a wiring substrate equipped with a rerouted wiring having one end connected to an electronic-part mounting pad for electrically connecting an electronic part and another end connected to an external-connection terminal. In this wiring substrate, a low-elasticity underlayer, i.e., underlayer made of a material having a lower modulus of elasticity than that of a base material of the wiring substrate is disposed between the base material of the wiring substrate and each of the electronic-part mounting pad and the rerouted wiring.
Further, according to another aspect of the present invention, there is provided a method of manufacturing a wiring substrate of the present invention, the method comprising the steps of:
forming a low-elasticity underlayer, from a material having a lower modulus of elasticity than that of a base material of the wiring substrate, in a pattern that the external-connection terminal formed on the base material of the wiring substrate is exposed; and
forming the electronic-part mounting pad and the rerouted wiring in predetermined patterns, respectively, on the low-elasticity underlayer.
Further, according to still another aspect of the present invention, there is provided a method of manufacturing a wiring substrate of the present invention, the method comprising the steps of:
forming a high-elasticity underlayer from a material having a higher modulus of elasticity than that of a base material of the wiring substrate, followed by forming a low-elasticity underlayer from a material having a lower modulus of elasticity than that of the base material in a region smaller than the region of the high-elasticity underlayer, and forming a conductive metal layer in substantially the same region as that of the high-elasticity underlayer; and
selectively removing the conductive metal layer, thereby forming the electronic-part mounting pad, the rerouted wiring, and the external-connection terminal in predetermined patterns, respectively.
Apparently, the xe2x80x9chigh-elasticityxe2x80x9d underlayer is an underlayer made of a material having a higher modulus of elasticity than that of a base material of the wiring substrate.
Furthermore, according to still another aspect of the present invention, there is provided a method of manufacturing a wiring substrate of the present invention, the method comprising the steps of:
forming a low-elasticity underlayer from a material having a lower modulus of elasticity than that of a base material of the wiring substrate, followed by forming a high-elasticity underlayer from a material having a higher modulus of elasticity than that of the base material in a region smaller than the region of the low-elasticity underlayer, and forming a conductive metal layer in substantially the same region as that of the low-elasticity underlayer; and
selectively removing the conductive metal layer, thereby forming the electronic-part mounting pad, the rerouted wiring, and the external-connection terminal in predetermined patterns, respectively.
In addition, according to still another aspect of the present invention, there is provided a semiconductor device that includes the wiring substrate of the present invention, and an electronic part electrically connected and mounted on the pad of the wiring substrate.